BS ISO 17987-7:2016 IS017987-7:2016(E) Power Supply Vps S4 S1 GND RCOMMON VuT: [VsUP / VBAT], S5A Pulse Generator Implementation S5B Under Test IUT CREI CCOMMON GND Input Trigger S2 GND Measurement Figure59-Testsystem:Verifyinginternalcapacitanceand dynamicinterference-IUTasslave Table137definesthetestsystem"Switch settingsdependingonIUTconfiguration". Table137-Testsystem:SwitchsettingsdependingonIUTconfiguration Switch Setting Normally closed. $3 In case where IUT has switchable and deactivated internal pull-up (e.g. in power loss conditions), open S3. Normally closed. S4 In case where IUT is a 3-pin node or ECU, where reverse polarity protection is included in IUT, open S4. In case where IUTis connected bya wire harness:Duringreferencemeasurement, close both S5Aand S5A/S5B S5Band disconnectIUTfromharness.So theharness capacitance is accountedforinthereference. Table138 defines thetest system“Verifying internal capacitance and dynamic interference-IUT as slave" @ IS0 2016 - All rights reserved 115 BSISO17987-7:2016 IS017987-7:2016(E) Table138-Testsystem:Verifyinginternalcapacitanceanddynamicinterference-IUTasslave IUT node as Class B device as slave [EPL-CT 80].1, [EPL-CT 80].2, [EPL-CT 80].3 Class Adevice Initial state Operational conditions: VIUT: [VsUP/VBAT] 24 V RCOMMON 1 k2 (0,1 %) CCOMMON 750 pF (1,5 nF + 1,5 nF in series) (1 %) RREF 30 k2 (0,1 %) CREF 250 pF (100 pF Il 150 pF parallel) (1 %) Test steps The LIN Bus is driven with a 10 kHz rectangular signal with a duty cycle of 50 %. Risetime≤40ns.Slope time measurements are done at 10 %, 90 % of slope voltage. S5B closed: Measuring rise time TREF ona known capacitance of 250 pF+750 pF. S5A closed:Measuring rise time Tint with the IUT internal capacitance + 750 pF. Response CsLAVE shall be less than or equal to 250 pF: Tint ≤ TREF. The IUT shall not interfere with the dynamic stimulus. Reference IS017987-4:2016,Table20,Param37and IS0 179874:2016, 5.3.9.2. Table139definesthetestcases"VerifyinginternalcapacitanceanddynamicinterferenceIUTasslave". Table139-Testcases:Verifyinginternalcapacitanceand dynamicinterference-IUTasslave EPL-CT-TC Condition S1 S2 Vps [EPL-CT 80].1 Normal power supply IUT shall be in normal mode. GND [EPL-CT 80].2 Vps Vps IUTloss of GND (IUTGND shorted to power supply) [EPL-CT 80].3 IUT losS of Vps (IUT VIUT: [VsUP/VBAT] shorted to GND) GND GND 7.3 Operationmodetermination 7.3.1 General An external resistor Rmeas is switched to the LIN pin. To get the value of the internal resistor, current and voltage shall bemeasured.These values are gathered for two different settings, and the internal resistance is calculated using Formulae (1) (2) (3) and (4) Figure6Q showsthetestconfiguration ofthetestsystem"Operationmode". 116 @ IS0 2016 - All rights reserved BSISO17987-7:2016 IS017987-7:2016(E) Remote Controlled Power Supply Vps RINT Vrur: [VsuP / VBAT] Imeas1/2 LIN Implementation Under Test GND H as1/ Measurement Figure 60 -Testsystem:Operationmode 7.3.2 [EPL-CT81]Measuringinternalresistor-IUTasslave Table14Qdefinesthetestsystem"Measuringinternalresistor-IUTas slave". Table140-Testsystem:Measuringinternalresistor-IUTasslave IUTnodeas Class A device Class Bdeviceas slave Initial state Parameters: Rmeas1 10 k2 (0,1 %) Rmeas2 20 k2 (0,1 %) Operationalconditions: VIUT: [VsUP/VBAT] 24 V Test steps The IUT shallbe in operational/active mode.There isno communication on the LINbus If the IUT incorporates a bus dominant state timeout detection, which disables the IUT's pull- up resistor, the measurement shall take place beforea timeout is detected. Response Rint value shall be included in the range [20k2; 60 k2]; see Formula (4) Reference IS0 17987-4:2016, Table 11, Param 26 7.3.3 [EPL-CT82]Measuringinternalresistor-IUTasmaster Table141 defines the test system"Measuring internal resistor-IUTas master" @IS0 2016 -All rights reserved 117